• 专利附录
  • 专利说明
  • 权利要求
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    • 专利摘要:
    The present invention relates to an HDTV video camera that outputs a signal conforming to the HDTV standard by a vertical doubling method using a minimum memory and a low pixel three-plate CCD. 1/2 pixels are interlaced in the vertical and horizontal directions spatially, and interpolation is performed again between signals in the signal processing to virtually form a kind of pixel and an intermediate signal between the pixels. Therefore, the present invention uses the CCD of 630,000 pixels or less, the price is low, the resolution is increased by the staggered arrangement of the R, G, B CCD elements, there is an effect that the real-time processing is possible while minimizing the memory.
    公开号:KR19980053611A
    申请号:KR1019960072730
    申请日:1996-12-27
    公开日:1998-09-25
    发明作者:장연석
    申请人:배순훈；대우전자 주식회사；
    IPC主号:
    专利说明:

    Video Camera for HDTV
    BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a video camera for HDTV, and more particularly, to a video camera for HDTV that outputs a signal conforming to the HDTV standard in a vertical doubling manner using a minimum memory and a low pixel three-plate CCD.
    In the conventional HDTV video camera, as shown in FIG. 1, R, G, and B-CCD (Charge Coupled Device) which photoelectrically converts light entering through the lens 100 and outputs the electrical R, G, and B signals ( 110), an analog processing system 120 for amplifying minute R, G, B signals output from the R, G, and B-CCD 110 and removing CCD noise, and outputting from the analog processing system 120 A / D converter (Analog / Digital Converter) 130 for converting the analog signal to a digital signal, and the digital signal output from the A / D converter (130) to perform a variety of correction as input luminance signal ( Y) and a digital signal processor (DSP) 140 for outputting color difference signals CB and CR.
    The operation of the conventional HDTV video camera configured as described above will be described.
    The light entering through the lens 100 is photoelectrically converted under the control of the CCD driving system in the R, G, and B-CCD 110 to be converted into the R, G, and B signals, which are electrical signals. The fine CCD output from the R, G, and B-CCD 110 is amplified by the analog processing system 120 and noise is removed. The analog signal output from the analog processing system 120 is input to the A / D converter 130 and converted into a digital signal.
    The digital signal output from the A / D converter 130 is corrected by the DSP 140 and then output as the luminance signal Y and the color difference signals CB and CR.
    However, the CCD 110 should use three CCDs of 1.3 million pixels or more to make 1024 lines. That is, in order to make the luminance signal and the chrominance signal of 1024 lines to meet the HDTV standard, CCDs of 1.3 million pixels or more for R, G, and B should be used. Therefore, the conventional video camera is expensive and the optical size is also large, there is a problem that can not be used as a consumer video camera.
    In order to solve the above problem, conventionally, pixel doubling was performed to increase the resolution while using a low-pixel CCD for making 512 lines. That is, pixel doubling is generally performed in the horizontal direction in order to obtain a better resolution with a fixed vertical and horizontal resolution of the CCD. This can be done by increasing the amount of latch that can actually delay in hardware while improving the resolution in the horizontal direction.
    Meanwhile, conventionally, line doubling is performed in the vertical direction to improve the resolution in the vertical direction. However, in order to double the line in the vertical direction, since one or more lines of data must be stored, a line memory must be added, which causes a problem in that a hardware burden increases.
    An object of the present invention to solve the above problems is to arrange the G CCD element and the R, B CCD element 1/2 pixels in the spatial and vertical directions, and to perform interpolation between the signals staggered in the signal processing again. Therefore, to provide a video camera for HDTV to increase the resolution by virtually making a kind of intermediate signal between the pixel and the pixel.
    In addition, another object of the present invention is to provide a video camera for HDTV to output a signal conforming to the HDTV standard with a low-pixel three-plate CCD.
    1 is a block diagram of a conventional HDTV video camera
    2 is a block diagram of a HDTV video camera according to the present invention
    3 is a structural diagram of the R, G, B CCD device of FIG.
    FIG. 4 illustrates a doubling method by the structure of the R, G, and B CCD elements of FIG.
    Drawing for
    5 is a detailed configuration diagram of the line doubling and matrix unit of FIG.
    6 is a signal waveform diagram for explaining a line doubling process.
    7 is a block diagram illustrating the configuration of the memory of FIG. 5.
    Explanation of symbols for the main parts of the drawings
    100, 200: Lens 110, 210, 211, 212, 213: CCD
    120, 220: Analog processing system 130, 230: A / D converter
    140, 240: DSP214: Prism
    250: line doubling and matrix section 310, 320, 330: memory
    311, 312: line FIFO313: 1/2 line FIFO
    340, 350: adder 360, 370: subtractor
    In order to achieve the above object, the video camera for HDTV according to the present invention is composed of G CCD elements and R, B CCD elements that are alternately disposed in the vertical and horizontal directions spatially and photoelectrically converts the light input through the lens into an electrical signal. 3-plate CCD (Charge Coupled Device) to output; An analog processing system for amplifying minute R, G, and B signals output from the 3-plate CCD and removing CCD noise; An analog / digital converter for converting R, G, and B analog signals output from the analog processing system into digital signals, respectively; A line doubling and matrix unit for outputting a luminance signal and a chrominance signal forming a double line by doubling and metricing the R, G, and B signals output from the A / D converter; And a DSP (Digital Signal Processor) for correcting and outputting a luminance signal and a color difference signal output from the line doubling and matrix unit.
    Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings.
    As shown in FIG. 2, the video camera for HDTV according to the present invention includes a three-plate type CCD 210, an analog processing system 220, an A / D converter 230, a DSP 240, and a line doubling and matrix unit ( 250).
    As shown in FIG. 3, the three-plate CCD 210 includes a G CCD element 213 and R and B CCD elements 211 and 212 that are alternately arranged in a vertical and horizontal direction in a spatial manner. Photoelectric conversion of the light entered through it is output as an electrical signal. At this time, the three-plate CCD 210 is made of a CCD of 630,000 pixels or less capable of making 512 lines.
    Here, as shown in FIG. 4, the R and B CCD elements 211 and 212 are disposed in the same direction with respect to the G CCD element 213 in the same direction.
    The analog processing system 220 amplifies minute R, G, and B signals output from the 3-plate CCD 210 and removes CCD noise.
    The A / D converter 230 converts the R, G, and B analog signals output from the analog processing system 220 into digital signals, respectively.
    The line doubling and matrix unit 250 doubles and matrixes R, G, and B signals output from the A / D converter 230 to form a double, that is, a luminance signal Y and a color difference. Output signals CR and CB.
    As illustrated in FIG. 5, the line doubling and matrix unit 250 includes three memories cyclically storing R, G, and B signals output from the A / D converter 230 in units of 2.5 lines. 310, 320, 330, an adder 340 for adding R and B signals output from the memories 310, 320, an output of the adder 340, and a G signal output from the memory 330. An adder 350 that adds and outputs a luminance signal Y, and a subtractor that outputs a color difference signal CR by subtracting a signal output from the adder 350 from an R signal output from the memory 310. 360, and a subtractor 370 that outputs a color difference signal CB by subtracting the signal output from the adder 350 from the B signal output from the memory 320.
    Here, the memory 310, 320, 330 is a line FIFO (First In First Out) for storing the R, G, B signals output from the A / D converter 230 in units of lines as shown in FIG. ) 311, a line FIFO 312 storing R, G, and B signals output from the line FIFO 311 on a line basis, and R, G, B signals output from the line FIFO 312. It is composed of a half line FIFO (313) for storing the unit in 1/2 line unit and outputs to the line FIFO (311).
    The DSP 240 corrects and outputs the luminance signal Y and the color difference signals CR and CB output from the line doubling and matrix unit 250.
    The operation of the HDTV video camera according to the present invention configured as described above will be described.
    Doubling means that the G CCD element and the R and B CCD elements are spaced apart from each other by half pixels in the vertical and horizontal directions as shown in FIG. 3, and the signals alternated in the signal processing as shown in FIG. 4. It is a method of increasing the resolution by virtually creating a kind of pixel and the intermediate signal between the pixels by performing interpolation again.
    Light entering through the lens 200 is converted into an electrical signal by photoelectric conversion in the R, G, B three-plate type CCD 210 having a pixel number of 630,000 pixels or less capable of producing 512 lines.
    At this time, as shown in FIG. 3, the G CCD elements 213 on the prism 214 and the R and B CCDs 211 and 212 are spatially arranged with the 1/2 pixels alternately in the vertical and horizontal directions, thereby virtually the pixels. Can increase the number of effects. That is, as shown in FIG. 4, interpolation is performed again between signals crossed with each other without increasing the number of pixels through the line doubling and the matrix unit 250, so that a kind of pixels and intermediate signals between pixels are virtually made to increase resolution. .
    The fine R, G and B CCD outputs from the R, G, and B three-plate CCDs 210 are amplified by the analog processing system 220, noise is removed, and the analog signals output from the analog processing system 220 are It is input to the A / D converter 230 and converted into a digital signal.
    The digital R, G, and B signals output from the A / D converter 230 are input to the line doubling and matrix unit 250 to doubling and metric lines to form a double line, that is, a luminance signal (that is, 1024 lines). Y) and the color difference signals CR and CB.
    That is, the R, G, and B signals, which can form 512 lines, are made of the 1024 lines of luminance signal Y and chrominance signal CR, CB conforming to the HD standard by the line doubling and matrixing unit 250. This will be described with reference to FIGS. 5, 6, and 7.
    The R, G, and B signals output from the A / D converter 230 and input to the line doubling and matrix unit 250 are pixel values corresponding to each pixel forming 512 lines. Incidentally, the luminance signal Y and the color difference signals CR and CB are calculated by the following equations (1), (2), and (3).
    [Equation 1]
    Y = αG + βB + γR
    [Equation 2]
    CR = R-Y
    [Equation 3]
    CB = B-Y
    Here, α, β, and γ are constants, and the luminance and chrominance signals Y, CR, and CB are linear functions for R, G, and B.
    The luminance and chrominance signals of 512 lines thus formed are line doubled as shown in Equation (4) below and output as luminance and chrominance signals of 1024 lines.
    [Equation 4]
    Y (1, 1) = G (1, 1) + R (1, 1) + B (1, 1)
    Y (2, 1) = G (2, 1) + R (1, 1) + B (1, 1)
    Y (3, 1) = G (2, 1) + R (2, 1) + B (2, 1)
    Y (4, 1) = G (3, 1) + R (2, 1) + B (2, 1)
    Y (5, 1) = G (3, 1) + R (3, 1) + B (3, 1)
    Y (6, 1) = G (4, 1) + R (3, 1) + B (3, 1)
    --------------------------
    Y (1024, 1) = G (512, 1) + R (512, 1) + B (512, 1)
    As described above, 1024 lines of luminance signals can be generated by doubling lines using R, G, and B signals of 512 lines, and color difference signals CR and CB can be obtained in the same manner.
    6 shows a line doubling process in real time. After the input signals G and R / B are doubled in line, the horizontal frequency is twice as fast as shown in Fig. 6 (c), and the actual first line appears after 1.5H based on the horizontal frequency of the input signal. As shown in (c), the (n, m) index for each line means that the luminance signal Y is made using the nth G line and the mth R, B lines.
    That is, the R, G, and B signals output from the A / D converter 230 are stored in the memories 310, 320, and 330 in line units, respectively.
    The luminance and chrominance signals Y, CR, and CB (2, n) of the first line among the 1024 lines are formed, which will be described in detail.
    After the R signal R (1, n) of the first line stored in the memory 310 and the B signal B (1, n) of the first line stored in the memory 320 are added in the adder 340, It is input to the adder 350. In addition, the G signal G (1, n) of the first line stored in the memory 330 is input to the adder 350, and is added to the output of the adder 340, so that the luminance signal Y (1) of the first line is added. , n)).
    Thus, after forming the luminance signal Y (1, n) of the first line among the 1024 lines, the color difference signals CR (1, n) and CB (1, n) of the first line should be generated.
    The color difference signal CR (1, n) of the first line is the luminance of the first line output from the adder 350 from the R signal R (1, n) of the first line stored in the memory 310. The signal Y (1, n) is subtracted by the subtractor 360 and output. In addition, the color difference signal CB (1, n) of the first line is a first line output from the adder 350 from the B signal B (1, n) of the first line stored in the memory 320. The luminance signal Y (1, n) is subtracted from the subtractor 370 and output.
    After calculating and outputting the luminance signal and the chrominance signal of 1024 lines in this way, the luminance signal (Y (2, n)) of the second line and the chrominance signal (CR (2, n), CB (2, n)) of the second line. You should create
    After the R signal R (1, n) of the first line stored in the memory 310 and the B signal B (1, n) of the first line stored in the memory 320 are added in the adder 340, It is input to the adder 350. In addition, the G signal G (2, n) of the second line stored in the memory 330 is input to the adder 350, and is added to the output of the adder 340, so that the luminance signal Y (2) of the second line is added. , n)).
    After forming the luminance signals Y (2, n) of the second line among the 1024 lines, the color difference signals CR (2, n) and CB (2, n) of the second line should be generated.
    The color difference signal CR (2, n) of the second line is the luminance of the second line output from the adder 350 from the R signal R (1, n) of the first line stored in the memory 310. The signal Y (2, n) is subtracted by the subtractor 360 and output. In addition, the color difference signal CB (2, n) of the second line is a second line output from the adder 350 from the B signal B (1, n) of the first line stored in the memory 320. The subtractor 370 subtracts the luminance signal Y (2, n).
    In this way, the luminance signal and the color difference signal of 1024 lines are configured by using the R, G, and B signals of 512 lines. That is, as shown in Fig. 6A, each line combines adjacent lines with each other to form a new line. In other words, a new line is formed using the R, G, and B signals of adjacent lines to make 512 lines into 1024 lines. Here, in order to be processed in real time, it is assumed that a line FIFO is simply required to hold the data currently being input, and that there is only one line of FIFO to perform line doubling, but as shown in FIG. 6 (b), at least 2.5 horizontal synchronization periods. The circular FIFO memory corresponding to (H) is used.
    That is, as shown in FIG. 6 (c), when the line doubling result is made, when the line having the (n, m) index is made, the 1.5H must be delayed because the n and m lines must already have entered the input FIFO. Since this must be stored once, a 1.5 line FIFO for storage and a 1 line FIFO currently being input are required as shown in FIG. Mutual horizontal synchronization should be correct at this time.
    Referring to FIG. 7, a process of circularly storing data in each FIFO corresponding to 2.5 lines will be described. The first and second lines are stored in line FIFOs 311 and 312, respectively, and the third to fifth lines are divided into line FIFOs 311 and 312 and 1/2 line FIFOs 313, respectively. It enters circularly at (311, 312).
    The line doubling is performed to output luminance and color difference signals (Y, CR, CB) of 1024 lines in accordance with the HD standard.
    The luminance and chrominance signals (Y, CR, CB) of 1024 lines conforming to the HD standard output from the line doubling and matrix unit 250 are input to the DSP 240 and corrected.
    That is, due to the pixel size of the CCD 210, only 512 lines are made to be output to the DSP 240, but the arrangement of the R, G, and B CCD elements is changed, and the line doubling and the matrix unit 250 double the lines to 1024 lines. It outputs video signal that meets HDTV standard.
    As described above, since the HDTV video camera according to the present invention uses a CCD of 630,000 pixels or less, the price is low, the resolution is increased by the staggered arrangement of the R, G, and B CCD elements, and the processing is minimized in real time. There is an effect that becomes possible.
    权利要求:
    Claims (8)
    [1" claim-type="Currently amended] Three-plate type that consists of G CCD elements 213 and R and B CCD elements 211 and 212 alternately spaced vertically and horizontally to photoelectrically convert light entering through the lens 200 to be output as an electrical signal. Charge Coupled Device (CCD) 210;
    An analog processing system 220 for amplifying minute R, G, and B signals output from the three-plate type CCD 210 and removing CCD noise;
    An analog / digital converter 230 for converting the R, G, and B analog signals output from the analog processing system 220 into digital signals, respectively;
    Line doubling which outputs luminance signal Y and chrominance signal CR and CB which double the lines by metricing the R, G and B signals output from the A / D converter 230 to form double lines, and The matrix unit 250; And
    The HDTV video camera comprising a digital signal processor (DSP) 240 for correcting and outputting a luminance signal Y and a color difference signal CR and CB output from the line doubling and matrix unit 250. .
    [2" claim-type="Currently amended] The HDTV video camera of claim 1, wherein the R and B CCD elements 211 and 212 are spaced apart from each other in the vertical and horizontal directions with respect to the G CCD element 213. .
    [3" claim-type="Currently amended] The HDTV video according to claim 2, wherein the R and B CCD elements 211 and 212 are alternately disposed in the vertical and horizontal directions with 1/2 pixels in the same direction around the G CCD element 213. camera.
    [4" claim-type="Currently amended] The video signal output device of a video camera for an HDTV according to claim 1, wherein the three-plate CCD (210) comprises a CCD of 630,000 pixels or less capable of producing 512 lines.
    [5" claim-type="Currently amended] The luminance signal Y of claim 4, wherein the line doubling and matrix unit 250 forms 1024 lines by doubling and metricing R, G, and B signals output from the A / D converter 230. ) And a chrominance signal (CR, CB).
    [6" claim-type="Currently amended] The first, second and third lines of claim 1, wherein the line doubling and matrix unit 250 cyclically stores R, G, and B signals output from the A / D converter 230, respectively. Memories 310, 320, 330; A first adder 340 for adding R and B signals output from the first and second memories 310 and 320; A second adder (350) for outputting a luminance signal (Y) by adding the output of the first adder (340) and the G signal output from the third memory (330); A first subtractor 360 for outputting a color difference signal CR by subtracting a signal output from the second adder 350 from an R signal output from the first memory 310; And a second subtractor 370 which outputs a color difference signal CB by subtracting a signal output from the second adder 350 from a B signal output from the second memory 320. Video camera for HDTV.
    [7" claim-type="Currently amended] The memory of claim 6, wherein the first, second, and third memories 310, 320, and 330 circulate R, G, and B signals output from the A / D converter 230 in units of 2.5 lines, respectively. HDTV video camera, characterized in that the storage.
    [8" claim-type="Currently amended] The apparatus of claim 7, wherein the first, second, and third memories 310, 320, and 330 store R, G, and B signals output from the A / D converter 230 in line units. One line First In First Out (FIFO) 311; A second line FIFO 312 for storing R, G, and B signals output from the first line FIFO 311 in line units; And a half line FIFO 313 that stores the R, G, and B signals output from the second line FIFO 312 in units of 1/2 lines and outputs them to the first line FIFO 311. Featured video camera for HDTV.
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    同族专利:
    公开号 | 公开日
    引用文献:
    公开号 | 申请日 | 公开日 | 申请人 | 专利标题
    法律状态:
    1996-12-27|Application filed by 배순훈, 대우전자 주식회사
    1996-12-27|Priority to KR1019960072730A
    1998-09-25|Publication of KR19980053611A
    优先权:
    申请号 | 申请日 | 专利标题
    KR1019960072730A|KR19980053611A|1996-12-27|1996-12-27|Video cameras for HDTV|
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